Data processors are used for processing vast quantities of information very rapidly. Integrated circuit microprocessor technology improvements have progressively increased the processing speed of those devices. Generally a microprocessor and a separate integrated circuit random access memory device are combined into a microcomputer system as a practical operating arrangement. Integrated circuit random access memory devices generally fall into one of two categories.
One category of random access memory includes static storage cells. Such static random access memory (SRAM) devices are designed to operate at very fast speeds and can readily operate as fast as contemporary integrated circuit microprocessors. Although they operate fast enough to keep up with the microprocessor, the static random access memory devices are relatively expensive to produce. Their high cost causes microcomputer system designers to look for lower cost memory alternatives to minimize microcomputer system cost.
A second category of random access memory devices includes dynamic storage cells. Dynamic random access memory (DRAM) devices are designed to be very inexpensive by comparison to the cost of static random access memory devices. Although they have a very attractive low cost, dynamic random access memory devices generally operate significantly slower than the previously mentioned static random access memory devices. Their speed is slow enough that microcomputer system designers look for other devices and special arrangements to speed up the dynamic memory function so that the microcomputer system can operate at faster and faster speeds.
One recently proposed solution to the memory speed and cost trade-off is an arrangement known as a smart memory. A smart memory is an integrated circuit device that includes both a processing core and a memory array. The processing core is operable to execute instructions stored in the memory array and to communicate data with the memory array. External connections to the smart memory are arranged so that the smart memory functions as a standard random access memory device with respect to internal devices.
Known smart memory devices are limited in the types of paths through which data can flow within the device. Such limited types of data paths reduce the flexibility of accessing data within the smart memory devices and of processing that data and other data.